Product Summary

The EP2C8T144C8N Cyclone II device contains a two-dimensional row- and column-based architecture to implement custom logic. Column and row interconnects of varying speeds provide signal interconnects between logic array blocks (LABs), embedded memory blocks, and embedded multipliers. The logic array of EP2C8T144C8N consists of LABs, with 16 logic elements (LEs) in each LAB. An LE is a small unit of logic providing efficient implementation of user logic functions. LABs are grouped into rows and columns across the device. The EP2C8T144C8N range in density from 4,608 to 68,416 LEs.

Parametrics

EP2C8T144C8N absolute maximum ratings: (1)Supply voltage: –0.5 to 1.8 V With respect to ground; (2)Output supply voltage: –0.5 4.6 V; (3)PLL supply voltage: –0.5 to 1.8 V; (4)DC input voltage: –0.5 to 4.6 V; (5)DC output current, per pin: –25 to 40 mA; (6)Storage temperature: –65 to 150 ℃; (7)Junction temperature: 125 ℃ at BGA packages under bias.

Features

EP2C8T144C8N features: (1)High-density architecture with 4,608 to 68,416 LEs: M4K embedded memory blocks, Up to 1.1 Mbits of RAM available without reducing available logic, 4,096 memory bits per block (4,608 bits per block including 512 parity bits), Variable port configurations of ×1, ×2, ×4, ×8, ×9, ×16, ×18, ×32, and ×36; (2)Embedded multipliers: Up to 150 18- × 18-bit multipliers are each configurable as two independent 9- × 9-bit multipliers with up to 250-MHz performance, Optional input and output registers; (3)Advanced I/O support: High-speed differential I/O standard support, including LVDS, RSDS, mini-LVDS, LVPECL, differential HSTL, and differential SSTL.

Diagrams

EP2C8T144C8N block diagram

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